NI Circuit Design Suite 11.0.2 Edu Win32Eng/Ger/Jpn NI电路设计套件11.0.2教学版
Windows系统下（Linux和MAC系统下请自行了解清楚）NI的各种软件、模块、工具包、驱动程序，使用NI许可证管理器来激活的，绝大部分的都可以使用NI Lincense Activator来激活：NI序列号Serial Number生成激活工具NI License Activator，LabVIEW/VBAI/VDM/VAS等软件模块工具包破解工具不限版本http://visionbbs.com/thread-490-1-1.html视觉论坛的各种NI资源，除了视觉相关的模块有使用外，大部分的都不会使用，仅提供资源不提供技术支持。资源的下载地址一般会同时提供NI官方和百度网盘的地址。某些工具包NI地址失效或没有NI地址，只能使用百度网盘地址；如果百度网盘地址失效过期，可联系论坛客服更新。NI的服务器在美国，有时候速度很慢或下载容易出错，这样会造成安装时各种错误而无法安装。建议在下载完成后，对下载资源做校验和(NI一般会提供MD5或SHA256等)验证，与官方或视觉论坛提供的校验和对比，一致就可以安装；如不一致，则需要重新下载。视觉论坛早期下载上传的资源，基本上都是正常下载的资源；2019后下载的资源，都与NI的正确校验和对比过，保证是正确的资源才上传到百度网盘。校验和工具下载地址：文件Hash计算器FHash，文件校验和验证下载文件正确性验证，MD5值计算、SHA1值计算、SHA256值计算、CRC32值计算http://visionbbs.com/thread-26524-1-1.html
NI Circuit Design Suite 11.0.2 Edu Win32Eng/Ger/Jpn NI电路设计套件11.0.2教学版
Circuit Design Suite(CDS)电路设计套件
电路设计套件结合了Multisim和Ultiboard软件，为电路设计、仿真、验证和布局提供了一套完整的工具。
电路设计套件为您提供了直观且经济高效的设计电路工具。您可以执行交互式SPICE仿真并无缝转换到PCB布局和布线软件。该套件专为教学、科研和设计而开发，提供了先进的仿真功能，可以让您清楚地了解电路在各种场景下的性能。
11.0.2EDU
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NI Circuit Design Suite 11.0.2 Readme for WindowsApril 2011This file contains important last-minute information about Circuit Design Suite 11.0.2 for Windows, including installation issues, compatibility issues, bugs fixed, and changes from Circuit Design Suite 11.0. Refer to the NI Circuit Design Suite Release Notes for a complete list of new features in Circuit Design Suite 11.0.2 . You can access this document by selecting Help»Release Notes in Multisim or Ultiboard or navigating to Start»All Programs»National Instruments»Circuit Design Suite 11.0»Documentation»Release Notes.Refer to the Getting Started with NI Circuit Design Suite manual for information about getting started with Circuit Design Suite. You can access this PDF from Start»All Programs»National Instruments»Circuit Design Suite 11.0»Documentation»Getting Started.Supported Platforms
Installing Circuit Design Suite 11.0.2
Known Issues
Bug Fixes
New Components
Supported PlatformsCircuit Design Suite 11.0.2 supports Windows Vista/XP 32-bit editions, Windows Vista 64-bit edition, Windows 7 32-bit and 64-bit editions, Windows Server 2003 R2 (32-bit) and Windows Server 2008 R2 (64-bit). Circuit Design Suite 11.0.2 does not support Windows NT/Me/98/95/2000, Windows XP x64, or the Windows Server non-R2 editions.Installing Circuit Design Suite 11.0.2Installing Multiple VersionsCircuit Design Suite 11.0.2 upgrades Circuit Design Suite 11.0. You cannot install Circuit Design Suite 11.0.2 side-by-side with version 11.0. You must reactivate Circuit Design Suite after you install it. It will not activate itself automatically.Installing Circuit Design Suite SilentlyYou can install Circuit Design Suite without viewing any installation dialog boxes. Refer to the silent_install.txt file in the Supportfiles directory in the Circuit Design Suite distribution for more information about installing Circuit Design Suite silently.Archiving Circuit Design Suite databasesNational Instruments recommends that you regularly back up the files created within the Multisim and Ultiboard components of NI Circuit Design Suite. Additionally, you should back up internal files that store user-created data, such as database components. For more information about which files to backup and where to find them, refer to the Help.UninstallingUninstalling Circuit Design Suite will not remove user data. For more information about the locations of user database and configuration files, refer to the Archiving Data Help topic.Known IssuesLabVIEW
[*]LabVIEW functionality (LabVIEW instruments and grapher interpolation) will not work if the installation path uses characters that are not native to the "Language for non-Unicode programs" setting, available by selecting Start»Control Panel»Regional and Language Options and selecting the Advanced tab. In the Vista OS, use the "Current language for non-Unicode programs:" setting in the Administrative tab. LabVIEW functionality works for Unicode characters that are native to this setting.
Windows Vista
[*]You cannot install Circuit Design Suite 11.0.2 on Windows Vista Starter edition.
Circuit Design Suite
[*]Multisim and Ultiboard leak GDI resource handles when used over extended periods of time, eventually leading to unpredictable user interface behavior and crashes. This is an issue with MFC applications running on Windows XP SP2 and Windows Server 2003. For more information and workarounds, refer to KB 4JREGSXL:Multisim or Ultiboard Leaking GDI Resource Handles.
[*]The Multisim Buzzer component will not generate any sound in Windows Vista-64 bit and on Windows XP-64 bit. This is due to Microsoft not supporting use of the Beep function in those versions of Windows. The Beep function is used by this component to generate sound.
[*]Push button double-pole single-throw switches can cause convergence errors if any of their pins are left unwired. To avoid these convergence errors, connect any of the remaining unused pins to ground.
[*]Node names containing '/', '\' and '+' will not work in the Postprocessor. You can work around this by ensuring that your net names have preferred names that do not use those characters.
Release Notes
[*]Circuit Design Suite Release Notes 11.0.2 state that the Forward Annotation and Backward Annotation dialogs have two new buttons called "Go to next conflict" and "Go to previous conflict". These are actually called "Jump to next conflict" and "Jump to previous conflict".
Bug FixesThe following is a subset of the issues fixed between Circuit Design Suite 11.0 and Circuit Design Suite 11.0.1
Multisim ( 112 )
Bug IDDescription
108322Cannot click finish in MCU wizard if the project type is load external hex file.
109518Two layers can improperly end up with the same layer name in some cases.
111245The pin mapping for the VGM96VC is incomplete.
111336Undo and Redo menu items are not translated in the Symbol Editor / Title Block Editor.
111614Convergence Assistant doesn't use LabVIEW or ELVIS instruments.
112376Printing an instrument over a wireless network takes a long time in some cases.
112563Word generator properties window resizes itself when changing display format.
112599Rated LEDs have unrealistic parameters.
113343The Temperature parameter in the resistor property pages does not validate out-of-range values correctly in some cases.
113500Agilent function generator does not model 50 ohm output impedence correctly.
113509Agilent oscilloscope vertical zoom can go up to 1nV/div.
114056Goto location generated by confirming virtual connection is static.
114477Footprint mapping for ADG413BRZ is incorrect.
114874spreadsheet results tab go to arrows are out of sync with the circuit after a replace by HB operation.
114972The shortcut key Ctrl-F does not open the find dialog window in the Description box editor.
115056Analysis dialog should not allow selecting duplicate device/model parameters.
115143Labview intrument Signal Analyzer is not saving Interpolation Method.
115148Labview Microphone doesn't save or copy its Sample Rate setting.
115833Schematic does not refresh correctly after closing the symbol/title block editor.
115869Moving a group of components where no autowire is needed still causes autowiring.
115936Multisim allows renaming components when the schematic is read only.
115938Nets can be renamed if the read-only property is set on the schematic.
115942Disabling Instruments toolbar in Circuit Restrictions prevents components from being placed from In-use list.
115960MOSFET DEFAS instance parameter not saved.
115985GRAPH_LCD* Display components are almost impossible to read given the color choices.
116077Refdes with underscores truncated after cut and paste.
116222PWL source does not generate error if external file does not exist.
116241Deleting a model from the User database eventually causes error in "Edit Model" dialog.
116247Integration method is being translated before passed to simulator.
116277Lock Subsheets option disables Copy and Cut tasks.
116336Forward annotating does not remove unused component after change to multisection component.
116395Bus IO and offpage connectors do not stay connected to bus after rotating.
116422Oscilloscope Trigger Type Buttons names are truncated.
116486Connecting a component to pins in Ultiboard will not correctly backannotate when it is in a hierarchical block.
116517The function generator instrument does not respect setting changes made during simulation when connected in certain configurations.
116520Function generator LabVIEW instrument repeat button is broken.
116539Instance footprint mapping does not update schematic.
116559Physical constants return zero for analyses.
116587Moving component in Database Manager changes component name.
116625Disabling the NI ELVISmx Arbitrary Waveform Generator output signal while simulating will crash multisim.
116631Connector name should be allowed to be the same as another component.
116634dBm Measurement in the Spectrum Analyzer is incorrect.
116637Naming an on-page connector with the same name a component had when placed can mess up the reference descriptor.
116671Netlist report doesn't display the sections of multisection components.
116675Changing net on hidden pin connection through spreadsheet causes prompt to rename all things on the net.
116690Find information can yield incorrect behaviour after deleting and placing components.
116693Cannot set hidden pin connections in spreadsheet.
116695Hidden pins become out of sync using the gate optimizer.
116696OPC connector names on multi-page not being updated.
116712Importing a ms10 circuit containing multi-section component does not work correctly in some cases.
116716Simulation settings not being imported correctly if set to disabled.
116718Undoing with subcircuits does not work as expected.
116724Connecting a net with an existing onpage to a hidden pin will create a floating on-page connector and will not actually connect to the hidden pin.
116726Overwriting common hierarchical block on save when upgrading schematic crashes Multisim.
116768Search Fails In the Component Browser When Used From the Component Wizard.
116771Replace By Subcircuit Creates Unnecessary I/O Pins.
11677674LS11D IC has an error in symbol model mapping.
116779RefDes drops leading zeroes.
116801There is no prompt to save changes when exiting the Description box edit view.
116805Multiple sections of a multi-section component can have inconsistent refdes..
116806Different sections of a single component can be mistaken for two components by BOM.
116807Component properties are not synchronized properly when sections have different cases for refdes.
116837RefDes change is not backannotated if component is not present in any of the component databases.
116845Dragging selection disconnects bus wires.
116846Colour of nets in a locked schematic can still be modified.
116856The ~ symbol leading a net name causes the SPICE parser to fail.
116867Undo of any action on main design messes up refdeses of components inside subcircuit.
116873Hidden pin information gets wiped out after a refdes rename.
116877The controlled one shot negative edge trigger is broken.
116881Multisim crashes when deleting and editing a component in some cases.
116901Refdeses inside a subcircuit will reset when a part is removed that has a refdes partially matching the subcircuit's refdes.
116911Renaming multisection component RefDes to lower case can crash Multisim in some cases.
116917Refdes R1A in subcircuit gets renamed to R1A1 after undo action in top level design.
116920Connect pin to net difference getting lost after un-pair then re-pair of net in back annotation dialog.
116928Flipping a voltmeter or ammeter horizontally crashes when only one pin is connected.
116939Multisim crashes when you perform overlapping place actions via keyboard.
116957Back Annotation crashes Multisim in some cases after Rename/Renumber Components has been used.
116959Selection is kept after bus lines are deleted from the Bus Settings dialog.
116995Unable to change the sheet size of NI Elvis II Design.
117003Copy and paste of nested subcircuits inserts invalid refdes into refdes manager.
117007Power Factor reading from the watt meter is incorrect in some cases.
117016Possible application crash in some cases displaying the Database Manager.
117036ERC check is flagging NC pins as warning for unconnected pins.
117054Undoing a delete trace action in the grapher can crash Multisim.
117065Changing a setting in the function generator instrument during simulation inverts the duty cycle percentage.
117075RefDes Visibility setting is ignored for power source components.
117083Edited model is not refreshed if component properties dialog is not closed.
117086Warning message always been prompted even if AWG and Fgen instruments are not selected to be active.
117091Search does not work if item is previously entered in component field.
117093Hovering over an unselected design can incorrectly return focus on an instrument property dialog.
117098PLD HBs break the net link when used within another PLD Schematic.
117099Simulation crashes if you change the state of the D pins while the simulation is running.
117111Possible application crash while simulating in some cases using certain instruments.
117193Changing visibility settings for labels using design toolbox does not mark file as dirty..
117201AC plots from Monte-Carlo and Worst-Case mis-label the axies.
117257Hiding RefDes using sheet properties in a SC/HB removes the hierarchical connection information.
117272Nets through probes fail if the wires overlap in some cases.
117273Printing a PLD design crashes Multisim in some cases.
117274Component renumber does not respects page ordering.
117336Multi-page schematics should print in the order which they appear in the Design Toolbox.
117379Copy and paste of line loses grid snap.
117392Creating a new PLD will allow creating a PLD with an invalid name if the name ends with \.
117410Reordering the sheets doesn't change the sheet numbers in title blocks.
117586ADA4841-1YRZ causes an internal simulation error.
117610Clicking cancel on the Variant Manager can crash Multisim in some cases.
117635The models for 74LS393N and 74LS393D are incorrect.
117666Performing Worst case analysis can crash Multisim in some cases.
117880ENERGIZING_COIL Is Not Energizing the NC_CONTACT and NO_CONTACT.
117534Title Block Title Field Resets to File Name After Undo.
117838Changing the net color using the Net properties dialog temporarily shows a blank color box.
117901X is not placed on common pin of multisection component that is connected to a net after running a gate optimize operation.
117790Digital_Frequency_Divider causes netlist error.
Ultiboard ( 53 )
115709Importing an Orcad max file will make the component refdes a part of the footprint's name.
116445Gate optimizer does not work for components with custom section names.
112465Trace width are different in Ultiboard Nets Spreadsheet and Net Edit dialog.
112691Copying and pasting a pad into the 'Custom Pad shape edit mode' does not allow you to save the shape.
114327Deleting Open Trace Ends Causes Ultiboard to Hang in some cases.
114366Ultiboard does not refresh preview box if selection is made in the spreadsheet view using keyboard.
114375Gerber doesn't export the pad copper ring correctly.
114545Clicking on Lock button toggles locked status in multiple selection situation.
114582Locked button status does not reflect selection for Parts tab.
114608Duplicate D-codes permitted when entering values through keyboard.
114618Circles with a wide thickness are expanded in the Gerber file.
114875Removing a net from a net group will revert Max via count to 2147483647.
115058It is possible to enter invalid clearances in the group editor.
115060Group editor component spacing values are not validated.
115100Aperture mapping list should be sortable.
115174Dialog should check for valid values when assinging D-Codes.
115275Pin layer properties are not preserved when component changes board side.
115321SVG doesn't export the pad copper ring correctly - layer settings are ignored.
115370Part spacing DRC error indicator can be misleading sometimes.
115476Ultiboard allows for duplicate category names in its database tree.
115670Closing an unsaved design will close immediately and then prompt to save.
115671Bus group drc message is cryptic.
115674DRC errors appear inconsistently for overlapping parts.
115687Pin and gate swapping should not use use group settings if the part is not in a group.
115691Right clicking on checkbox for visibility shows context menu for wrong layer.
115719Ruler bars disappear after exiting from full screen mode.
115737Dialog box title keeps counting up after placing board outline with multiple connectors.
115948Ultiboard crashes when opening the 3D View in some cases.
116373Imported OrCAD File does not have Silkscreen Information.
116374When connecting traces to vias the Assume Net field is empty in some cases.
116532Changes made to text objects after Apply button is used doesn't get made.
116549Changing RefDes for multi-section components in MS after a gate swap in UB does not properly update net connections.
116667Crash exporting to NC drill while doing in-place part edit.
116750Crash showing properties of a via placed in a CAD design.
116824Ultiboard does not respond when moving a component attached to overlapping vias.
116857Selection filters not correctly saved in Ultiboard.
116874Thermal relief settings for copper areas are inverted.
116896False positive when you separate out net and footprint change.
116910Placing a hole causes the DXF export to generate a large file.
116929Reference point on land patterns changes when being edited.
116933TRIKO301812 has silkscreen overlapping pad.
116944Editing a custom pad while placing a part crashes Ultiboard.
116966Ultiboard can become unresponsive while trying to open certain designs.
117002Parts without silkscreen are impervious to part shoving.
117033Ultiboard crashes when closing an open design in some cases.
117067Silkscreen text not selectable if copper top is grayed out.
117100Voiding is not being performed between copper area connected to net and copper area not connected to net.
117173Enter Coordinate dialog crashes when it looses focus and user clicks OK.
117453Invoking board wizard after placing a test point crashes Ultiboard.
117467Multisim and Ultiboard does not asks to Save work before closing when shutting down the computer.
117479Wrong part is set for delete when forward annotating in some cases.
117560Forward annotating an UltiCap file can crash Ultiboard in some cases.
117719Back annotation wiring fails after manual pairing two resistors.
The following is a subset of the issues fixed between Circuit Design Suite 11.0.1 and Circuit Design Suite 11.0.2
Multisim ( 16 )
Bug IDDescription
274360Datasheet link for AD8698ARM is incorrect.
275547Lengthening a bus causes connected wires to lose the bus entry node.
275663Inconsistent component symbols causing bad boards.
275692Grapher View Corrupting Cursor Data When In Print Preview Or Printing.
277619BC807 and BC817 Symbol To Footprint Mapping May Be Incorrect.
277720OPA340PA and OPA340UA Symbol and Footprint Mapping Error Pins 6 and 7 Are Swapped.
279104Component 1B4B42 Bridge Rectifier Has Wrong Footprint Mapping And Has Limited Simulation capabilities.
279151Selecting To Edit The Symbol In This File Causes The Part To Change Position.
282251LM324AN maps to incorrect land patterns for all manufacturers.
282415Local File System Hyperlinks Not Working in Multsim 11.0.1.
282519Components REF01 and REF02 are missing the "TEMP" pin.
284506The option to connect Analog to Digital ground when exporting to Ultiboard behaves inconsistently.
285737Changing net color from the spreadsheet can crash Multisim.
286304Pins are swapped when exporting to Ultiboard even though schematic appears OK.
287436NUD3160DMT1 and NUD3160LT1 should have the same single section model.
282888The image returned by the Multisim Automation API method GetCircuitImage () does not contain the correct component refdes' in some cases.
Ultiboard ( 4 )
275662Trying to complete traces in this file causes Ultiboard to become unresponsive in some cases..
279148Merge Polygons Is Severely Corrupting The Gerber Export.
280216Ultiboard crashed randomly when moving a component.
285491Similar parts appear on different rows when exporting the BOM in Ultiboard.
New ComponentsThe following components are new in Multisim 11.0.1:
[*]38 Analog Devices components
Analog Devices
AD737ANADA4817-1ARDZAD827JR-16AD736ARAD736AQAD825AR-16AD737BQAD737AR
AD8016ARBAD8675ARMZAD8504ARUZAD8304ARUADA4937-1YCPZ-R2AD8397ARZAD8397ARDZADA4817-1ACPZ-R2
AD8667ARZAD8667ARMZAD8675ARZADA4858-3ACPZ-R2AD8133ACP-R2ADA4939-2YCPZ-R2ADA4855-3YCPZ-R2ADA4817-2ACPZ-R2
ADA4939-1YCPZ-R2ADA4932-2YCPZ-R2ADA4932-1YCPZ-R2ADA4937-2YCPZ-R2AD8148ACPZ-R2ADA4853-3YCPZ-R2AD8541ARZAD736JNZ
ADA4853-2YCPZ-R2ADA4853-1AKSZ-R2AD8146ACPZ-R2AD8147ACPZ-R2ADA4853-3YRUZAD8145YCPZ-R2
Copyright© 2011 National Instruments Corporation. All rights reserved.Under the copyright laws, this publication may not be reproduced or transmitted in any form, electronic or mechanical, including photocopying, recording, storing in an information retrieval system, or translating, in whole or in part, without the prior written consent of National Instruments Corporation.TrademarksNational Instruments, NI, ni.com, and LabVIEW are trademarks of National Instruments Corporation. Electronics Workbench, Multisim and Ultiboard are trademarks of National Instruments. Refer to the Terms of Use section on ni.com/legal for more information about National Instruments trademarks.Other product and company names mentioned herein are trademarks or trade names of their respective companies.The EKV MOST model used in this software was developed, implemented and tested by the Electronics Laboratory (LEG) of the Swiss Federal Institute of Technology (EPFL).Patents
For patents covering the National Instruments products/technology, refer to the appropriate location: Help» Patents in your software, the patents.txt file on your media, or the National Instruments Patent Notice at ni.com/patents.
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