NI-RIO 2.1Patch旧版设备驱动Windows系统32位English补丁

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NI-RIO 2.1Patch旧版设备驱动Windows系统32位English补丁

NI-RIO（旧版）
NI-RIO用于为可重配置硬件设备提供支持。
NI-RIO是一个设备驱动，用于支持可重配置I/O (RIO)硬件的识别、编程和部署。它为CompactRIO模块、多功能可重配置I/O设备、PXI多功能可重配置I/O模块和FlexRIO仪器提供了支持。

2.1
文件大小: 58641634 字节 (55.93 MB)
修改日期: 2010-05-12 03:26
MD5: 4d60eecf72170107b7ffd0908443f61c（官方正确）
SHA1: eab8cc334678eaecf9b681998c48d7e3a63bff9c
SHA256: e0fb74d0acfd88a6fd617b0edc8ba5db2864f2f15da26835e2b26221098ecf13
CRC32: 48175915

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NI-RIO 2.1 Readme

July 2006

ni.com/support

This file contains important information about NI-RIO 2.1, including information on installing NI-RIO 2.1, descriptions of known issues for installing and using NI-RIO 2.1, and information about the hardware and software supported by NI-RIO 2.1.

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• Installing NI-RIO 2.1
• Known Issues for using NI-RIO 2.1 with LabVIEW 8.x
• Known Issues for using NI-RIO 2.1 with LabVIEW 7.1
• Supported Hardware and Software
  

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Installing NI-RIO 2.1

There are two NI-RIO 2.1 installation CDs, but typical installations require only the first CD. The installer will prompt you to insert the second CD if it is needed.

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Known Issues for using NI-RIO 2.1 with LabVIEW 8.x

These known issues are specific to using NI-RIO 2.1 with LabVIEW 8.x.

• Increased use of FPGA resources—New features in NI-RIO 2.1 slightly increase the use of FPGA resources in digital input and digital output modules. Use a digital port instead of multiple digital lines to reduce the impact on FPGA resource utilization. Refer to the KnowledgeBase for more information.
• DMA from the host to the FPGA target on the cRIO-9002/9004—DMA is not supported from the host to the FPGA target on the cRIO-9002/9004. LabVIEW returns an error if you try to output DMA from the cRIO-9002/9004.
• DMA in parallel While Loops—If you use DMA in parallel While Loops either on the cRIO-9002/9004 or while accessing the FPGA target across a network, one of the While Loops might hang while the other executes.
• DMA has slow performance on the cRIO-9002/9004—At around 4-6MB/s, DMA consumes a considerable portion of the memory bus bandwidth, which prevents the host CPU from executing. This issue occurs only when data is arriving at a steady rate. If the FPGA buffers data to be written to the FIFO and transfers it as chunks of 32-words or so, DMA can sustain higher rates and incur lower CPU overhead.
  Visit ni.com/info and enter DMAspeedandCPU for a solution to this issue.
• Select Address option on the Open FPGA VI Reference function does not work if LabVIEW FPGA is not installed—If you do not have LabVIEW FPGA installed, right-clicking the Open FPGA VI Reference function and selecting Select Address from the shortcut menu searches for VIs that are not on your system and returns no targets to select from. You can select the FPGA target programmatically using the resource name input by right-clicking the Open FPGA VI Reference function, selecting Show Resource Input from the shortcut menu, and wiring the resource name input to a control or constant supported by the FPGA target.
• Dragging a project folder that contains modules or expansion chassis can delete items—If you drag a project folder that contains C Series modules or R Series Expansion Chassis from one FPGA target to another FPGA target, the module or chassis items may be lost. Dragging the folder to an FPGA target that has fewer available slots or connectors than modules or chassis in the folder will delete the items in the folder without an available slot or connector. To avoid losing module or chassis items, move items that do not have an available slot or connector in the new target out of the folder before you drag the folder, or copy the folder instead of dragging it. You can press the key while you drag the folder to copy the folder.
• Moving C Series modules in LabVIEW projects can invalidate target-specific module settings—Dragging or copying an NI 9203, NI 9205, NI 9206, NI 9852, or NI 9853 module between targets of different device families in the Project Explorer window can invalidate settings for the module that are target-specific. You can use the C Series Module Properties dialog box to reconfigure module settings that have become invalid.
• Default arbitration for R Series digital outputs is Never Arbitrate—The default arbitration option for newly created R Series digital output channels and ports is now Never Arbitrate, which is faster and more efficient in terms of FPGA resource usage than the Always Arbitrate option. The selected arbitration options for existing R Series digital output channels and ports remain unchanged. Use the Never Arbitrate option if the FPGA VI never writes to the same line or port from more than one place at the same time; otherwise, select a different arbitration option. Refer to the LabVIEW Help for more information about arbitration.
• Mass Compile Tool prevents you from opening files in previous versions—You cannot use the File»Save for Previous option with FPGA or FPGA Interface VIs and functions. To continue using the VIs with the FPGA Module 1.x, do not use the mass compile tool on FPGA or FPGA Interface VIs that were last saved in a previous version without first creating backup files.
• Abnormal termination of LabVIEW can result in incorrect behaviors in MAX and LabVIEW—If you abnormally terminate LabVIEW and then see unexpected behavior relaunching LabVIEW or MAX, you should reboot the computer.
• Slow installation/uninstallation progress—If you click the Modify button in the National Instruments Software dialog box, available in the Add or Remove Programs utility, after you install the LabVIEW FPGA Module, the installer can take up to 10 minutes to initialize.
• Import utility replaces Abort method with Reset method—A host VI created with the FPGA module 1.x might have used the Abort method with an Invoke Method function or as part of the Close FPGA VI Reference. The import utility replaces the Abort method with the Reset method. The Abort method in the FPGA Module 1.x reset the FPGA VI to default values. The Reset method in the FPGA Module 8.2 resets the FPGA VI to default values. In the FPGA Module 8.2, the Abort method stops the FPGA VI but does not reset the values to their default values. By replacing the Abort method with the Reset method, the import utility preserves behavior of your program. No action on your part is necessary.
• Imported host VI broken—The host VI might import improperly to LabVIEW 8.2 if any of the following conditions apply: you use constants for the HW Exec Ref parameter on the block diagram, you use Call By Reference Nodes that pass the HW Exec Ref parameter, or you use strict type definitions of the HW Exec Ref parameter with property nodes to get or set their value. Open the host VI and manually replace all instances of the HW Exec Ref that are broken with the new HW Exec Ref coming from the Open FPGA VI Reference.
• Disable legacy USB support on PXI Embedded Real-Time controllers—You must disable Legacy USB Support in the BIOS of PXI Embedded Real-Time Controllers when you use the FPGA Interface functions. Specific controllers affected are the PXI-817x controllers and any other third-party systems that use the PhoenixBIOS. Failure to do so can result in the Open FPGA VI Reference function failing to download the FPGA VI without returning an error. Subsequent reads using the Read/Write Control function return values where all bits of the data type are set to 1 without an error. National Instruments also recommends disabling Legacy USB Support when you use the LabVIEW Real-Time Module to reduce jitter. Disable Legacy USB support by configuring the BIOS of the controller.
• No FPGA download progress indication when running on an RT target—Pop-up windows are not supported in executables running on RT targets. Therefore, no pop-up window appears to indicate when an FPGA VI is programmatically downloaded by a host VI running on an RT target.
• Opening host VIs that include the FPGA Interface functions might take many minutes to open—Host VIs that contain the FPGA Interface functions might take a long time to open because the FPGA Interface functions need several support files to manage the interface with FPGA VIs. The FPGA Interface functions also verify the status of the FPGA VI when you open the host VI.
• Unclear Controller Documentation—The procedures for synchronizing the time bases and enabling the Microsecond Timed Loops on your cRIO-9002/9004 RT controllers are not clear. Visit ni.com/info and enter synctimebases for information about how to complete this task.
  

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Known Issues for using NI-RIO 2.1 with LabVIEW 7.1

These known issues are specific to using NI-RIO 2.1 with LabVIEW 7.1.

• Save for Previous is not supported—You cannot use the File»Save for Previous option with FPGA or FPGA Interface VIs and functions. Back up all of your existing LabVIEW 7.0 files before opening them with LabVIEW 7.1.
• Opening Existing VIs in LabVIEW 7.1—If you created host VIs using LabVIEW 7.0 and the FPGA Interface functions from the FPGA Module 1.0, the VI might be broken when you open it in LabVIEW 7.1. Select Tools肇PGA Interface Update Utility from the front panel or block diagram of the VI to restore the VI by updating the HW Exec Ref and HW Exec Ref Out parameters in the VI and its subVIs. Run the utility for each host VI you created using LabVIEW 7.0.
• LabVIEW sometimes returns a Memory is full error when you try to run a host VI on the CompactRIO controller—Go to ni.com/info and enter rdbitstream. Use this utility to reduce the size of the VI.
• Queries for multiple remote devices increase the amount of time LabVIEW takes to populate the Execution Target list and to launch the Embedded Project Manager —If several remote systems are enabled, LabVIEW can take a minute or longer to populate the Execution Target list. The amount of time it takes depends on the number of enabled and offline remote systems. If you want to decrease the time it takes to populate the Execution Target list and to launch the Embedded Project Manager, disable the offline remote devices in Measurement & Automation Explorer (MAX). Refer to the Measurement & Automation Explorer Help for information about disabling the CompactRIO Reconfigurable Embedded Chassis and disabling a device in VISA.
• In emulation mode, executing multiple Wait on Edge or Wait on Level methods in parallel does not work correctly—Executing multiple Wait on Edge or Wait on Level methods in parallel works correctly in other modes.
• You must install support for the NI PCI-7831R, NI PXI-7811R, and NI PXI-7831R to use the CompactRIO getting started examples
• When LabVIEW is targeted to Windows, RTX-enabled RIO devices do not appear in the VISA Resource Name pull-down menu—You must target LabVIEW to an RTX target to make RTX-enabled RIO devices appear in the VISA Resource Name pull-down menu. You can access RTX-enabled devices from a remote target. Right-click the Open FPGA VI Reference function and select External VISA Input from the shortcut menu. Wire the VISA address for the remote target to the VISA Resource Name input of the Open FPGA VI Reference function.
• LabVIEW returns the incorrect warning when the Wait on IRQ method times out—LabVIEW returns warning code 1073676309. This warning code is not defined. Use the Timed Out output for this method to detect time outs.
• Disable Legacy USB Support on PXI Embedded Real-Time Controllers—You must disable Legacy USB Support in the BIOS of PXI Embedded Real-Time Controllers when you use the FPGA Interface functions. Specific controllers affected are the PXI-817x controllers and any other third-party systems that use the PhoenixBIOS. Failure to do so can result in the Open FPGA VI Reference function failing to download the FPGA VI without returning an error. Subsequent reads using the Read/Write function will return values where all bits of the data type are set to 1 without an error. National Instruments also recommends disabling Legacy USB Support when using the LabVIEW Real-Time Module to reduce jitter.
• FPGA Interface: Simultaneous Reads/Write to Arrays or Clusters Can Return Bad Data—You can use the Read/Write Control function on the FPGA Interface palette to read or write to arrays or clusters on the front panel of the FPGA VI. If you read or write to two locations in the host VI at the same time, LabVIEW might return bad data. Make sure that reading or writing to an array or cluster does not occur in parallel with any other reading or writing to the same array or cluster.
• Using the Application Builder—The Open FPGA VI Reference function checks that the FPGA Interface is up to date and that the bitfile is up to date. You will receive an error if either of these checks fails. LabVIEW disables these checks when you build the Open FPGA VI Reference function into an executable. Before you build an application using the Application Builder, run the host VI to verify that the FPGA Interface functions interact properly with the FPGA VI with no errors.
• Error 1073 When Building Applications—When you build applications from FPGA VIs or host VIs using the Application Builder, make sure the Disconnect type definitions and remove unused polymorphic VI instances checkbox contains a checkmark. If you receive Error 1073 while building an application, the error might tell you to uncheck this option. Instead, make sure that the Just-In-Time Advice dialog box is closed.
• Consider Using the VISA Resource Name Input on the Open FPGA VI Reference Function for Systems with Multiple FPGA Devices—By default, the Open FPGA VI Reference function uses relative addressing. However, relative addresses can change. For example, if you have one FPGA device installed in your development computer, its relative address is 0. If you then enable remote finding for a remote system with additional FPGA devices, the address of the FPGA device in your local development computer changes. To create a program with static references, use the VISA Resource Name input by right-clicking the Open FPGA VI Reference function and selecting External VISA Input from the shortcut menu. The Open FPGA VI Reference function now has an additional input to which you can wire an FPGA device VISA resource name. Refer to the LabVIEW Help, available by selecting Help»VI, Function, & How-To Help in LabVIEW, for more information about the Open FPGA VI Reference function and relative addressing.
  

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Supported Hardware and Software

Visit ni.com/info and enter rdsoftwareversion for a complete list of the hardware that is supported by this and previous versions of NI-RIO as well as what versions of LabVIEW software are supported by each version of NI-RIO.

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Copyright

© 2006 National Instruments Corporation. All rights reserved.

Under the copyright laws, this publication may not be reproduced or transmitted in any form, electronic or mechanical, including photocopying, recording, storing in an information retrieval system, or translating, in whole or in part, without the prior written consent of National Instruments Corporation.

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National Instruments, NI, ni.com, and LabVIEW are trademarks of National Instruments Corporation. Refer to the Terms of Use section on ni.com/legal for more information about National Instruments trademarks.

Patents

For patents covering the National Instruments products, refer to the appropriate location: Help» Patents in your software, the patents.txt file on your CD, or ni.com/patents.